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tc74hc123ap/af 2012-02-29 1 toshiba cmos digital integrat ed ci rcuit silicon monolithic tc74hc123ap,tc74hc123af dual retriggerable monostable multivibrator the tc74hc123a is a high speed cmos monostable multivibrator fabricated with silicon gate c 2 mos technology. it achieves the high speed op eration similar to equivalent lsttl while maintaining the cmos low power dissipation. there are two trigger inputs, a input (negative edge), and b input (positive edge). these inputs are valid for a slow rise/fall time signal (tr = tf = 1 s) as they are schmitt trigger inputs. this device may also be triggered by using clr input (positive edge). after triggering, the output stays in a monostable state for a time period determined by the external resistor and capacitor (rx, cx ). a low level at the clr input breaks this state. in the monostable state, if a new trigger is applied, it extends the monostable period (retrigger mode). limits for cx and rx are: external capacitor, cx: no limit external resistor, rx: v cc = 2.0 v more than 5 k ? v cc 3.0 v more than 1 k ? all inputs are equipped with prot ection circuits against static discharge or transient excess voltage. features (note) ? high speed: t pd = 25 ns (typ.) at v cc = 5 v ? low power dissipation standby state: i cc = 4 a (max) at ta = 25c active state: i cc = 700 a (max) at ta = 25c ? high noise immunity: v nih = v nil = 28% v cc (min) ? output drive capability: 10 lsttl loads ? symmetrical output impedance: |i oh | = i ol = 4 ma (min) ? balanced propagation delays: t plh ? t phl ? wide operating voltage range: v cc (opr) = 2 to 6 v ? pin and function compatible with 74ls123 note: in the case of using only one circuit, clr should be tied to gnd, rx/cx ? cx ? q ? q should be tied to open, the other inputs should be tied to v cc or gnd. tc74hc123ap tc74hc123af weight dip16-p-300-2.54a : 1.00 g (typ.) sop16-p-300-1.27a : 0.18 g (typ.)
tc74hc123ap/af 2012-02-29 2 pin assignment iec logic symbol
tc74hc123ap/af 2012-02-29 3 block diagram (note 1)(note 2) note 1: cx, rx, dx are external capacitor, resistor, and diode, respectively. note 2: external clamping diode, dx; the external capacitor is charged to v cc level in the wait state, i.e. when no trigger is applied. if the supply voltage is turned off, cx is discharges mainly through the internal (par asitic) diode. if cx is sufficiently large and v cc drops rapidly, there will be some possi bility of damaging the ic through in rush current or latch-up. if the capacitance of t he supply voltage filter is large enough and v cc drops slowly, the in rush current is automatically limit ed and damage to the ic is avoided. the maximum value of forward current through the parasitic diode is 20 ma. in the case of a large cx, the limit of fall ti me of the supply voltage is determined as follows: t f (v cc ? 0.7) cx/20 ma (tf is the time between the supply voltage turn off and the supply voltage reaching 0.4 v cc .) in the event a system does not satisfy the above co ndition, an external clamping diode (dx) is needed to protect the ic from in rush current. truth table inputs outputs a b clr q q function h h output enable x l h l h inhibit h x h l h inhibit l h output enable l h output enable x x l l h inhibit x: don?t care
tc74hc123ap/af 2012-02-29 4 system diagram timing chart l h r qd q ck r x /c x c x a b clr q q v cc v cc f/f q p q n v ref c 1 v ref c 2
tc74hc123ap/af 2012-02-29 5 functional description (1) stand-by state the external capacitor (cx) is fully charged to v cc in the stand-by state. that means, before triggering, the q p and q n transistors which are connected to the rx/cx node are in the off state. two comparators that relate to the timing of the output pulse, and two reference voltage supplies turn off. the total supply current is only leakage current. (2) trigger operation trigger operation is effective in any of the follo wing three cases. first, the condition where the a input is low, and the b input has a rising sign al; second, where the b input is high, and the a input has a falling signal; and third, where the a input is low and the b input is high, and the clr input has a rising signal. after a trigger becomes effective, compar ators c1 and c2 start operating, and q n is turned on. the external capacitor discharges through q n . the voltage level at the rx/cx node drops. if the rx/cx voltage level falls to the internal reference voltage vr ef l, the output of c1 becomes low. the flip-flop is then reset and q n turns off. at that moment c1 stops but c2 continues operating. after q n turns off, the voltage at the rx/cx node star ts rising at a rate determined by the time constant of external capacitor cx and resistor rx. upon triggering, output q becomes high, following some delay time of the internal f/f and gates. it stays high even if the voltage of rx/cx change s from falling to rising. when rx/cx reaches the internal reference voltage vref h, the output of c2 becomes low, the output q goes low and c2 stops its operation. that means, after triggering, when th e voltage level of the rx/cx node reaches vref h, the ic returns to its monostable state. with large values of cx and rx, and ignoring th e discharge time of the capacitor and internal delays of the ic, the width of the outp ut pulse, tw (out), is as follows: tw (out) = 1.0 cx rx (3) retrigger operation when a new trigger is applied to either input a or b while in the monostable state, it is effective only if the ic is chargi ng cx. the voltage level of the rx/cx node then falls to vref l level again. therefore the q output stays high if the next trigger comes in before the time period set by cx and rx. if the new trigger is very close to previous trigger, such as an occurrence during the discharge cycle, it will have no effect. the minimum time for a trigger to be effect ive 2nd trigger, trr (min.), depends on v cc and cx. (4) reset operation in normal operation, the clr input is held high. if clr is low, a trigger has no effect because the q output is held low and the tr igger control f/f is reset. also, q p turns on and cx is charged rapidly to v cc . this means if clr is set low, the ic goes into a wait state.
tc74hc123ap/af 2012-02-29 6 absolute maximum ratings (note 1) characteristics symbol rating unit supply voltage range v cc ? 0.5 to 7 v dc input voltage v in ? 0.5 to v cc + 0.5 v dc output voltage v out ? 0.5 to v cc + 0.5 v input diode current i ik 20 ma output diode current i ok 20 ma dc output current i out 25 ma dc v cc /ground current i cc 50 ma power dissipation p d 500 (dip) (note 2)/180 (sop) mw storage temperature t stg ? 65 to 150 c note 1: exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in ic performance or even destruction. using continuously under heavy loads (e.g. the app lication of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temper ature/current/voltage, etc. ) are within the absolute maximum ratings and the operating ranges. please design the appropriate reliability upon reviewing the toshiba semiconductor reliability handbook (?handling precautions?/?derating concept and methods?) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). note 2: 500 mw in the range of ta = ? 40 to 65c. from ta = 65 to 85c a derating factor of ? 10 mw/c shall be applied until 300 mw. operating ranges (note 1) characteristics symbol rating unit supply voltage v cc 2 to 6 v input voltage v in 0 to v cc v output voltage v out 0 to v cc v operating temperature t opr ? 40 to 85 c input rise and fall time ( clr only) t r , t f 0 to 1000 (v cc = 2.0 v) 0 to 500 (v cc = 4.5 v) 0 to 400 (v cc = 6.0 v) ns external capacitor cx no limitation (note 2) f external resistor rx 5 k (v cc = 2.0 v) (note 2) 1 k (v cc 3.0 v) (note 2) note 1: the operating ranges must be maintai ned to ensure the normal op eration of the device. unused inputs must be tied to either vcc or gnd. note 2: the maximum allowable values of cx and rx are a function of leakage of c apacitor cx, the leakage of tc74hc123a, and leakage due to boar d layout and surface resistance. susceptibility to externally induced noise signals may occur for rx > 1 m .
tc74hc123ap/af 2012-02-29 7 electrical characteristics dc characteristics test condition ta = 25c ta = ? 40 to 85c characteristics symbol v cc (v) min typ. max min max unit high-level input voltage v ih ? 2.0 4.5 6.0 1.50 3.15 4.20 ? ? ? ? ? ? 1.50 3.15 4.20 ? ? ? v low-level input voltage v il ? 2.0 4.5 6.0 ? ? ? ? ? ? 0.50 1.35 1.80 ? ? ? 0.50 1.35 1.80 v i oh = ? 20 a 2.0 4.5 6.0 1.9 4.4 5.9 2.0 4.5 6.0 ? ? ? 1.9 4.4 5.9 ? ? ? high-level output voltage (q, q ) v oh v in = v ih or v il i oh = ? 4 ma i oh = ? 5.2 ma 4.5 6.0 4.18 5.68 4.31 5.80 ? ? 4.13 5.63 ? ? v i ol = 20 a 2.0 4.5 6.0 ? ? ? 0.0 0.0 0.0 0.1 0.1 0.1 ? ? ? 0.1 0.1 0.1 low-level output voltage (q, q ) v ol v in = v ih or v il i ol = 4 ma i ol = 5.2 ma 4.5 6.0 ? ? 0.17 0.18 0.26 0.26 ? ? 0.33 0.33 v input leakage current i in v in = v cc or gnd 6.0 ? ? 0.1 ? 1.0 a rx/cx terminal off-state current i in v in = v cc or gnd 6.0 ? ? 0.1 ? 1.0 a quiescent supply current i cc v in = v cc or gnd 6.0 ? ? 4.0 ? 40.0 a active-state supply current (note) i cc v in = v cc or gnd rx/cx = 0.5 v cc 2.0 4.5 6.0 ? ? ? 45 400 0.7 200 500 1.0 ? ? ? 260 650 1.3 a a ma note: per circuit
tc74hc123ap/af 2012-02-29 8 timing requirements (input: t r = t f = 6 ns) test condition ta = 25c ta = ? 40 to 85c characteristics symbol v cc (v) typ. limit limit unit minimum pulse width t w (l) t w (h) ? 2.0 4.5 6.0 ? ? ? 75 15 13 95 19 16 ns minimum clear width t w (l) ? 2.0 4.5 6.0 ? ? ? 75 15 13 95 19 16 ns rx = 1 k cx = 100 pf 2.0 4.5 6.0 325 108 78 ? ? ? ? ? ? ns minimum retrigger time t rr rx = 1 k cx = 0.01 f 2.0 4.5 6.0 5.0 1.4 1.2 ? ? ? ? ? ? s ac characteristics (c l = 15 pf, v cc = 5 v, ta = 25c, input: t r = t f = 6 ns) characteristics symbol test condition min typ. max unit output transition time t tlh t thl ? ? 4 8 ns propagation delay time ( a, b-q, q) t plh t phl ? ? 25 36 ns propagation delay time ( clr trigger-q, q ) t plh t phl ? ? 26 41 ns propagation delay time ( clr -q, q) t plh t phl ? ? 16 27 ns
tc74hc123ap/af 2012-02-29 9 ac characteristics (c l = 50 pf, input: t r = t f = 6 ns) test condition ta = 25c ta = ? 40 to 85c characteristics symbol v cc (v) min typ. max min max unit output transition time t tlh t thl ? 2.0 4.5 6.0 ? ? ? 30 8 7 75 15 13 ? ? ? 95 19 16 ns propagation delay time ( a, b-q, q ) t plh t phl ? 2.0 4.5 6.0 ? ? ? 102 29 22 210 42 36 ? ? ? 265 53 45 ns propagation delay time ( clr trigger-q, q) t plh t phl ? 2.0 4.5 6.0 ? ? ? 102 31 23 235 47 40 ? ? ? 295 59 50 ns propagation delay time ( clr -q, q) t plh t phl ? 2.0 4.5 6.0 ? ? ? 68 20 16 160 32 27 ? ? ? 200 40 34 ns cx = 28 pf rx = 6 k (v cc = 2 v) rx = 2 k (v cc = 4.5 v, 6 v) 2.0 4.5 6.0 ? ? ? 700 250 210 2000 400 340 ? ? ? 2500 500 425 ns cx = 0.01 f rx = 10 k 2.0 4.5 6.0 90 95 95 110 105 105 130 115 115 90 95 95 130 115 115 s output pulse width tw out cx = 0.1 f rx = 10 k 2.0 4.5 6.0 0.9 0.9 0.9 1.0 1.0 1.0 1.2 1.1 1.1 0.9 0.9 0.9 1.2 1.1 1.1 ms output pulse width error between circuits (in same package ) tw out ? ? 1 ? ? ? % input capacitance c in ? ? 5 10 ? 10 pf power dissipation capacitance c pd (note) ? ? 162 ? ? ? pf note: c pd is defined as the value of the internal equivalent capacitance which is ca lculated from the operating current consumption without load. average operating current can be obtained by the equation: i cc (opr) = c pd ?v cc ?f in + i cc ? ? duty/100 + i cc /2 (per circuit) (i cc ?: active supply current) (duty. %)
tc74hc123ap/af 2012-02-29 10 output pulse width constant k ? supply voltage (typical) t wout ? cx characteristics (typ.) t rr ? v cc characteristics (typ.)
tc74hc123ap/af 2012-02-29 11 package dimensions weight: 1.00 g (typ.)
tc74hc123ap/af 2012-02-29 12 package dimensions weight: 0.18 g (typ.)
tc74hc123ap/af 2012-02-29 13 restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collect ively "toshiba"), reserve the right to make changes to the in formation in this document, and related hardware, software and systems (collectively "product") without notice. ? this document and any information herein may not be reproduc ed without prior written permission from toshiba. even with toshiba's written permission, reproduc tion is permissible only if reproducti on is without alteration/omission. ? though toshiba works continually to improve product's quality a nd reliability, product can malfunction or fail. customers are responsible for complying with safety standards and for prov iding adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situat ions in which a malfunction or failure of product could cause loss of human life, b odily injury or damage to property, including data loss or corruption. before customers use the product, create designs including the product, or incorporate the product into their own applications, cu stomers must also refer to and comply with (a) the latest ve rsions of all relevant toshiba information, including without limitation, this document, the specifications, the data sheets and applicat ion notes for product and the precautions and condi tions set forth in the "toshiba se miconductor reliability handbook" and (b) the instructions for the application with which the product will be us ed with or for. customers are solely responsible for all aspe cts of their own product design or applications, including but not limited to (a) determining the appropriateness of the use of this product in such design or applications; (b) eval uating and determining the applicability of any info rmation contained in this document, or in c harts, diagrams, programs, algorithms, sample application circuits, or any other referenced documents; and (c) validating all operatin g parameters for such designs and applications. toshiba assumes no liability for customers' product design or applications. ? product is neither intended nor warranted fo r use in equipments or systems that require extraordinarily high levels of quality and/or reliability, and/or a malfunction or failure of which may cause loss of human life, bodily injury, serious property damage and/or serious public impact ( " unintended use " ). except for specific applications as expressly stated in this document, unintended use includes, without limitation, equipment used in nuclear facilities, equipment used in the aerospace industry, medical equipment, equipment used f or automobiles, trains, ships and other transportation, traffic si gnaling equipment, equipment used to control combustions or expl osions, safety devices, elevators and escalators, devices related to electric power, and eq uipment used in financ e-related fields. if you use product for unintended use, toshiba assumes no liability for product. for details, please contact your toshiba sales representative. ? do not disassemble, analyze, reverse-engineer, alter, modify, translate or copy product, whether in whole or in part. ? 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